Neuromorphic computing is pursued to overcome the limitations of von Neumann architecture and Moore’s law. Harnessing brain-inspired properties such as in-memory computing, spike-based encoding, and adaptation has demonstrably shown to bolster energy-delay efficiency by a few orders of magnitude classes of computation. The use of functional building blocks in integrated circuits that exhibit characteristics like the biological building blocks of the central nervous system is expected to enable circuits to mimic tasks associated with human cognition and sensory perception. Thus, a variety of approaches has been used to design electronic neurons that generate spiking signals and to implement synaptic interconnects. The memristor was introduced by Leon Chua (UI Ph.D1964) in 1971 as a circuit element that is a fundamental as R, L, and C. The notion of the memristor was generalized by Chua and Kang in 1976. The research and development of memristor circuits and systems were propelled by the nanoscale memristors fabricated by Williams et al. in 2008. Since then, a myriad of applications has been developed for memristors in storage-class memory, sensing, logic operations and memcomputing. Recently, memristors have become available through commercial fabrication and are commercially used in non-volatile resistive random-access memories (RRAM). Memristor technologies have ushered in new approaches for emulating both biological neurons and synapses. Synaptic plasticity has been demonstrated in memristors by using spike trains to increase (potentiate) or decrease (depress) the memristor’s conductance. In this talk, we will discuss the roles of memristors in designing new building blocks for memristive neural networks for hardware acceleration. How to design new memristive neurons and synapses for neuromorphic computation will be discussed in view of integration packing density, power consumption, and physical layout of neuronal networks. It is projected that the 3.5 nm memristor technology node, memristive neurons and synapses in mimicry of human brain can be densely integrated in a 2400 cm2 of surface area with a total power consumption in the ballpark of 20W.
Sung-Mo “Steve” Kang is a Distinguished Chair Professor of the Jack Baskin School of Engineering, UC Santa Cruz, and Chancellor Emeritus of UC Merced and President Emeritus of KAIST. He received his B.S. degree from Fairleigh Dickinson University, Teaneck, New Jersey in 1970, an honorary B.S. degree from Yonsei University, M.S. degree, M.S. degree from the State University of New York at Buffalo in 1972, and Ph.D. degree from UC Berkeley in 1975, all in electrical engineering. He holds 16 U.S. patents, published over 500 papers, and 10 books. Prior to joining the faculty of University of Illinois at Urbana-Champaign in 1985 he had led the development of world’s premier CMOS 32-bit VLSI microprocessor chipsets for telecommunication and computing applications as a technical supervisor of AT&T Bell Laboratories, Murray Hill, NJ. From 1995 to 2000, he served as Department Head of ECE at the University of Illinois at Urbana-Champaign and became a Dean of Engineering at UC Santa Cruz. He has received honors, including the Silicon Valley Engineering Hall of Fame induction, Alexander von Humboldt Senior US Scientists Award, IEEE Millennium Medal, IEEE Mac Van Valkenburg Circuits and Systems (CAS) Society award, IEEECAS Technical Excellence Award, the US Semiconductor Research Corporation (SRC) Technical Excellence Award, IEEE Graduate Teaching Technical Field Award, IEEE Graduate Teaching Technical Field Award, IEEE CAS John Choma Education Award, and distinguished alumnus awards from UC Berkeley, The University at Buffalo, Fairleigh Dickinson University, and Yonsei University. Dr. Kang is a Fellow of the IEEE, the Association for Computing Machinery (ACM), and the American Association for the Advancement of Science (AAAS). He is a member of Korean Academy of Science and Technology and a foreign member of National Academy of Engineering, Korea. His research interest includes modeling and simulation of semiconductor devices, memristors and memristive systems, low-power VLSI circuit design, nano-bioelectronic circuits, and neuromorphic computing.