In-Memory Computing SoC with Multi-level RRAM to Accelerate AI Inference

Abstract: TetraMem will introduce its multi-level RRAM (Resistive Random-Access Memory) cell for in-memory computing. The talk will explain how TetraMem uses Multi-level RRAM to accelerate neural network inference applications. The speaker will demonstrate how TetraMem leverages its unique technology and expertise to increase precision, accuracy and energy efficiency of AI applications, including our methods to improve cell performance as recently published in Nature and Science.

Bio
Wenbo Yin is the SVP of IC Design at TetraMem. He joined the company in 2019 and currently leads the chip design efforts at TetraMem including mixed-signal circuit design and NPU architecture.
https://tetramem.ai/

Location Host: Valley Research Park is a coworking research campus of 104,000 square feet hosting 30+ life science and technology companies.
https://www.valleyresearchpark.com/

https://www.meetup.com/sf-bay-acm/events/307367954/

0:00 Chapter Intro
4:50 Speaker Intro
5:34 Presentation
6:55 TetraMem
7:25 Pushing AI Forward — Great But Not Without Challenges
12:01 Current Solutions Do Not Fix Bottlenecks
15:25 In-Memory Computing (IMC) — Most Fit Solution for AI Computing
16:38 In Memory Computing Crossbar and 1T1R Cell
18:54 TetraMem Analog In-Memory Compute
20:01 Computer Memory Needed: Memory with Special Attributes
21:16 Current Memory Device Main Limitations For Computing Applications
24:02 Computing Memristor For Computing Applications
27:18 In Memory Computing with Analog Non-volatile Memory Crossbar
29:55 Results From TetraMem Device/Chip Published In “Nature” and “Science”
37:07 TetraMem MX100 — First 8-bits/cell IMC Chip
40:39 MX100 On Chip AI Demos
45:51 Customer Model Flow
49:29 Opportunity and the Market
58:48 TetraMem — Company Summary
1:01:54 Thank you! (Q&A)