Photonics for Computing: from Optical Interconnects to Neuromorphic Architectures

How should someone exploit photonics in computing? Simply replacing the electrical with optical wires and increasing the datarate is the first and obvious answer, but the idiosyncrasy of photons can lead to improved architectures that can offer additional functionality in Datacom and computercom environments. This talk will concentrate on how photonics can bring significant functional benefits in computing architectures, spanning from disaggregated rack-scale through disintegrated board-scale and even to the emerging neuromorphic platforms, presenting how innovative optical switching, photonic Network-on-Chip and optical neuromorphic functions can shape a radically new computing environment with increased granularity, modularity, performance and energy efficiency.

We will discuss the main performance and energy challenges currently faced by the computing industry and we will present our recent research on photonic technologies towards realizing resource disaggregation at all hierarchy levels spanning from rack- down to board-chip-scale computing. We will demonstrate high-port count optical switch layouts based on the Hipoλaos Optical Packet Switch architecture with up to 1024×1024 input/output ports that allow for low-latency values well below the 1μsec target of disaggregated DCs. We will also demonstrate how silicon photonics and electro-optic PCBs can be utilized towards realizing on-board resource disaggregation for multi-socket compute node applications, holding the credentials to replace the dominant QPI interconnect by offering greater than 60% improvement in energy consumption with a single-hop flat any-to-any interconnect topology for great than 8-socket connectivity, i.e. greater than 100% improvement over QPI’s single-hop connectivity capabilities. Finally, we will demonstrate how optics can be incorporated in the emerging paradigm of neuromorphic computing towards offering high-performance at a significantly lower power envelope, presenting experimental realizations of an optical sigmoid function, a WDM-accelerated Convolutional Neural Network Architecture and an optical Recurrent and Gated Recurrent Unit (GRU).

This work has been carried out within the frame of the European H2020 projects ICT-STREAMS, L3MATRIX and MASSTART.

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